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? 2004 microchip technology inc. ds21314f-page 1 m mcp601/2/3/4 features ? single-supply: 2.7v to 5.5v ? rail-to-rail output ? input range includes ground ? gain bandwidth product: 2.8 mhz (typ.) ? unity-gain stable ? low quiescent current: 230 a/amplifier (typ.) ? chip select (cs ): mcp603 only ? temperature ranges: - industrial: -40c to +85c - extended: -40c to +125c ? available in single, dual and quad typical applications ? portable equipment ? a/d converter driver ? photo diode pre-amp ? analog filters ? data acquisition ? notebooks and pdas ? sensor interface available tools ? spice macro models at www.microchip.com ? filterlab ? software at www.microchip.com description the microchip technology inc. mcp601/2/3/4 family of low-power operational amplifiers (op amps) are offered in single (mcp601), single with chip select (cs ) (mcp603), dual (mcp602) and quad (mcp604) configurations. these op amps utilize an advanced cmos technology that provides low bias current, high- speed operation, high open-loop gain and rail-to-rail output swing. this product offering operates with a single supply voltage that can be as low as 2.7v, while drawing 230 a (typ.) of quiescent current per amplifier. in addition, the common mode input voltage range goes 0.3v below ground, making these amplifiers ideal for single-supply operation. these devices are appropriate for low-power, battery- operated circuits due to the low quiescent current, for a/d convert driver amplifiers because of their wide bandwidth or for anti-aliasing filters by virtue of their low input bias current. the mcp601, mcp602 and mcp603 are available in standard 8-lead pdip, soic and tssop packages. the mcp601 and mcp601r are also available in a standard 5-lead sot-23 package, while the mcp603 is available in a standard 6-lead sot-23 package. the mcp604 is offered in standard 14-lead pdip, soic and tssop packages. the mcp601/2/3/4 family is available in the industrial and extended temperature ranges and has a power supply range of 2.7v to 5.5v. package types v in + v in ? v ss v out v dd 1 2 3 4 8 7 6 5 nc nc nc v ina + v ina ? v dd v inc + v ss v outc v inc ? v outa v inb + v ind ? v outd v outb v inb ? v ind + v ina + v ina ? v ss v inb ? v outb 1 2 3 4 8 7 6 5 v dd v inb + v outa mcp601 pdip, soic, tssop mcp604 pdip, soic, tssop mcp602 pdip, soic, tssop v in + v ss v in ? 1 2 3 5 4 v dd v out mcp601 sot23-5 v in + v ss v in ? 1 2 3 6 4 v dd v out mcp603 sot23-6 cs 5 v in + v in ? v ss v out v dd 1 2 3 4 8 7 6 5 cs nc nc mcp603 pdip, soic, tssop 14 13 12 1 2 3 4 5 6 7 11 10 9 8 v in + v dd v in ? 1 2 3 5 4 v ss v out mcp601r sot23-5 2.7v to 5 .5v single - supply cmos op amps
mcp601/2/3/4 ds21314f-page 2 2004 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? v dd - v ss .........................................................................7.0v all inputs and outputs...................... v ss - 0.3v to v dd + 0.3v difference input voltage ........................................ |v dd - v ss | output short circuit current...................................continuous current at input pin .......................................................2 ma current at output and supply pins .............................30 ma storage temperature .....................................-65c to +150c junction temperature .................................................. +150c esd protection on all pins (hbm; mm) ................ 3 kv; 200v ? notice : stresses above those listed under ?maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. pin function table name function v in +, v ina +, v inb +, v inc +, v ind + non-inverting inputs v in ?, v ina ?, v inb ?, v inc ?, v ind ? inverting inputs v dd positive power supply v ss negative power supply v out , v outa , v outb , v outc , v outd outputs cs chip select nc no internal connection dc characteristics electrical specifications: unless otherwise specified, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2 and r l = 100 k to v dd /2. parameters sym min typ max units conditions input offset input offset voltage v os -2 0.7 +2 mv industrial temperature v os -3 1 +3 mv t a = -40c to +85c (note 1) extended temperature v os -4.5 1 +4.5 mv t a = -40c to +125c (note 1) input offset temperature drift v os / t a ?2.5?v/ct a = -40c to +125c power supply rejection psrr 80 88 ? db v dd = 2.7v to 5.5v input current and impedance input bias current i b ?1?pa industrial temperature i b ?2060pat a = +85c (note 1) extended temperature i b ? 450 5000 pa t a = +125c (note 1) input offset current i os ?1?pa common mode input impedance z cm ? 10 13 ||6 ? ||pf differential input impedance z diff ? 10 13 ||3 ? ||pf common mode common mode input range v cmr v ss ? 0.3 ? v dd ? 1.2 v common mode rejection ratio cmrr 75 90 ? db v dd = 5.0v, v cm = -0.3v to 3.8v open-loop gain dc open-loop gain (large signal) a ol 100 115 ? db r l = 25 k to v dd /2, v out = 100 mv to v dd ? 100 mv a ol 95 110 ? db r l = 5 k to v dd /2, v out = 100 mv to v dd ? 100 mv output maximum output voltage swing v ol , v oh v ss + 15 ? v dd ? 20 mv r l = 25 k to v dd /2, output overdrive = 0.5v v ol , v oh v ss + 45 ? v dd ? 60 mv r l = 5 k to v dd /2, output overdrive = 0.5v linear output voltage swing v out v ss + 100 ? v dd ? 100 mv r l = 25 k to v dd /2, a ol 100 db v out v ss + 100 ? v dd ? 100 mv r l = 5 k to v dd /2, a ol 95 db output short circuit current i sc ?22?mav dd = 5.5v i sc ?12?mav dd = 2.7v power supply supply voltage v dd 2.7 ? 5.5 v quiescent current per amplifier i q ? 230 325 a i o = 0 note 1: these specifications are not tested in either the sot-23 or tssop packages with date codes older than yyww = 0408. in these cases, the minimum and maximum values are by design and characterization only.
2004 microchip technology inc. ds21314f-page 3 mcp601/2/3/4 figure 1-1: mcp603 chip select (cs ) timing diagram. ac characteristics electrical specifications: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 50 pf. parameters sym min typ max units conditions frequency response gain bandwidth product gbwp ? 2.8 ? mhz phase margin pm ? 50 ? g = +1 v/v step response slew rate sr ? 2.3 ? v/s g = +1 v/v settling time (0.01%) t settle ? 4.5 ? s g = +1 v/v, 3.8v step noise input noise voltage e ni ?7?v p-p f = 0.1 hz to 10 hz input noise voltage density e ni ?29?nv/ hz f = 1 khz e ni ?21?nv/ hz f = 10 khz input noise current density i ni ?0.6?fa/ hz f = 1 khz mcp603 chip select characteristics electrical specifications: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 50 pf. parameters sym min typ max units conditions dc characteristics cs logic threshold, low v il v ss ?0.2 v dd v cs input current, low i csl -1.0 ? ? a cs = 0.2v dd cs logic threshold, high v ih 0.8 v dd ?v dd v cs input current, high i csh ?0.72.0acs = v dd shutdown v ss current i q_shdn -2.0 -0.7 ? a cs = v dd amplifier output leakage in shutdown i o_shdn ?1?na cs threshold hysteresis hyst ? 0.3 ? v internal switch timing cs low to amplifier output turn-on time t on ?3.110scs 0.2v dd , g = +1 v/v cs high to amplifier output high-z time t off ?100?nscs 0.8v dd , g = +1 v/v, no load. cs t off v out t on hi-z hi-z i dd 2 na (typ.) 230 a (typ.) output active i ss -700 na (typ.) -230 a (typ.) cs 700 na (typ.) 2na (typ.) current
mcp601/2/3/4 ds21314f-page 4 2004 microchip technology inc. temperature characteristics electrical specifications: unless otherwise indicated, v dd = +2.7v to +5.5v and v ss = gnd. parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 ? +85 c industrial temperature parts t a -40 ? +125 c extended temperature parts operating temperature range t a -40 ? +125 c note storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sot23 ja ? 256 ? c/w thermal resistance, 6l-sot23 ja ? 230 ? c/w thermal resistance, 8l-pdip ja ?85?c/w thermal resistance, 8l-soic ja ? 163 ? c/w thermal resistance, 8l-tssop ja ? 124 ? c/w thermal resistance, 14l-pdip ja ?70?c/w thermal resistance, 14l-soic ja ? 120 ? c/w thermal resistance, 14l-tssop ja ? 100 ? c/w note: the industrial temperature parts operate over this extended range, but with reduced performance. the extended temperature specs do not apply to industrial temperature parts. in any case, the internal junction temperature (t j ) must not exceed the absolute maximum specification of 150c.
2004 microchip technology inc. ds21314f-page 5 mcp601/2/3/4 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-1: open-loop gain, phase vs. frequency. figure 2-2: slew rate vs. temperature. figure 2-3: gain bandwidth product, phase margin vs. temperature. figure 2-4: quiescent current vs. supply voltage. figure 2-5: quiescent current vs. temperature. figure 2-6: input noise voltage density vs. frequency. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. -40 -20 0 20 40 60 80 100 120 1.e-0 1 1.e+0 0 1.e+0 1 1.e+0 2 1.e+0 3 1.e+0 4 1.e+0 5 1.e+0 6 1.e+0 7 frequency (hz) open-loop gain (db) -240 -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () 0.1 1 10 100 1k 10k 100k 1m 10m gain phase 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -50 -25 0 25 50 75 100 125 ambient temperature (c) slew rate (v/s) rising edge falling edge v dd = 5.0v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 0 10 20 30 40 50 60 70 80 90 100 110 phase margin, g = +1 () gbwp pm, g = +1 0 50 100 150 200 250 300 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) quiescent current per amplifier (a) +25c i o = 0 -40c +85c +125c 0 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 ambient temperature (c) quiescent current per amplifier (a) v dd = 2.7v v dd = 5.5v i o = 0 10 100 1,000 10,000 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 1.e+06 frequency (hz) input noise voltage density (v/ hz) 0.1 1 10 100 1k 10k 100k 1m 10 1 100n 10n
mcp601/2/3/4 ds21314f-page 6 2004 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-7: input offset voltage. figure 2-8: input offset voltage vs. temperature. figure 2-9: input offset voltage vs. common mode input voltage with v dd = 2.7v. figure 2-10: input offset voltage drift. figure 2-11: cmrr, psrr vs. temperature. figure 2-12: input offset voltage vs. common mode input voltage with v dd = 5.5v. 0% 2% 4% 6% 8% 10% 12% 14% 16% -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 input offset voltage (mv) percentage of occurrences 1200 samples -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 -50 -25 0 25 50 75 100 125 ambient temperature (c) input offset voltage (mv) v dd = 2.7v v dd = 5.5v -200 -100 0 100 200 300 400 500 600 700 800 -0.5 0.0 0.5 1.0 1.5 2.0 common mode input voltage (v) input offset voltage (v) v dd = 2.7v t a = -40c t a = +25c t a = +85c t a = +125c t a = +125c 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% -10 -8 -6 -4 -2 0 2 4 6 8 10 input offset voltage drift (v/c) percentage of occurrences 1200 samples t a = -40 to +125c 75 80 85 90 95 100 -50 -25 0 25 50 75 100 125 ambient temperature (c) cmrr, psrr (db) psrr cmrr -200 -100 0 100 200 300 400 500 600 700 800 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 common mode input voltage (v) input offset voltage (v) t a = -40c t a = +25c t a = +85c t a = +125c v dd = 5.5v t a = +125c
2004 microchip technology inc. ds21314f-page 7 mcp601/2/3/4 note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-13: channel-to-channel separation vs. frequency. figure 2-14: input bias current, input offset current vs. ambient temperature. figure 2-15: dc open-loop gain vs. load resistance. figure 2-16: cmrr, psrr vs. frequency. figure 2-17: input bias current, input offset current vs. common mode input voltage. figure 2-18: dc open-loop gain vs. supply voltage. 90 100 110 120 130 140 150 1.e+03 1.e+04 1.e+05 1.e+06 frequency (hz) channel to channel separation (db) no load 1k 10k 100k 1m 1 10 100 1000 25 35 45 55 65 75 85 95 105 115 125 ambient temperature (c) input bias and offset currents (pa) i b v dd = 5.5v v cm = 4.3v i os 80 90 100 110 120 1.e+02 1.e+03 1.e+04 1.e+05 load resistance ( ) dc open-loop gain (db) v dd =2.7v v dd =5.5v 100 1k 10k 100k 10 20 30 40 50 60 70 80 90 100 1 .e+00 1 .e+01 1 .e+02 1 .e+03 1 .e+04 1 .e+05 1 .e+06 frequency (hz) cmrr, psrr (db) cmrr v dd = 5.0v 100 1k 10k 100k psrr+ psrr- 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common mode input voltage (v) input bias and offset currents (pa) i b , +85c v dd =5.5v max. v cmr 4.3v i b , +125c i os , +85c i os , +125c 80 90 100 110 120 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) dc open-loop gain (db) r l =25k
mcp601/2/3/4 ds21314f-page 8 2004 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-19: gain bandwidth product, phase margin vs. load resistance. figure 2-20: output voltage headroom vs. output current. figure 2-21: maximum output voltage swing vs. frequency. figure 2-22: dc open-loop gain vs. temperature. figure 2-23: output voltage headroom vs. temperature. figure 2-24: output short-circuit current vs. supply voltage. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 1.e+02 1.e+03 1.e+04 1.e+05 load resistance ( ) gain bandwidth product (mhz) 30 40 50 60 70 80 90 100 phase margin, g = +1 () 100 10k 1k 100k v dd =5.0v gbwp pm, g = +1 1 10 100 1,000 0.01 0.1 1 10 output current magnitude (ma) output headroom (mv); v dd - v oh and v ol - v ss v dd -v oh v ol -v ss 0.1 1 10 1.e+04 1.e+05 1.e+06 1.e+07 frequency (hz) maximum output voltage swing (v p-p ) 10k 1m 100k 10m v dd = 5.0v 80 90 100 110 120 130 -50 -25 0 25 50 75 100 125 ambient temperature (c) dc open-loop gain (db) v dd =5.5v,r l =5k v dd =2.7v,r l =25k v dd =2.7v,r l =5k v dd =5.5v,r l =25k 1 10 100 1000 -50 -25 0 25 50 75 100 125 ambient temperature (c) output headroom (mv); v dd -v oh and v ol -v ss v dd -v oh ,r l =5k v ol -v ss ,r l =5k v dd -v oh ,r l =25k v ol -v ss ,r l =25k v dd =5.5v r l tiedtov dd /2 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) output short circuit current magnitude (ma) t a = -40c t a = +25c t a = +85c t a = +125c
2004 microchip technology inc. ds21314f-page 9 mcp601/2/3/4 note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-25: large signal non-inverting pulse response. figure 2-26: small signal non-inverting pulse response. figure 2-27: chip select timing (mcp603). figure 2-28: large signal inverting pulse response. figure 2-29: small signal inverting pulse response. figure 2-30: quiescent current through v ss vs. chip select voltage (mcp603). 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 .e+00 1 .e- 06 2 .e- 06 3 .e- 06 4 .e- 06 5 .e- 06 6 .e- 06 7 .e- 06 8 .e- 06 9 .e- 06 1 .e- 05 time (1 s/div) output voltage (v) v dd = 5.0v g = +1 2.41 2.43 2.45 2.47 2.49 2.51 2.53 2.55 2.57 2.59 0 .e+00 1 .e- 06 2 .e- 06 3 .e- 06 4 .e- 06 5 .e- 06 6 .e- 06 7 .e- 06 8 .e- 06 9 .e- 06 1 .e- 05 time (1 s/div) output voltage (20 mv/div) v dd = 5.0v g = +1 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0e+00 5.0e-06 1.0e-05 1.5e-05 2.0e-05 2.5e-05 3.0e-05 3.5e-05 4.0e-05 4.5e-05 5.0e-05 time (5 s/div) output voltage, chip select voltage (v) v dd =5.0v g=+1 v in =2.5v r l = 100 k to gnd cs v out active v out high-z 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 .e+00 1 .e- 06 2 .e- 06 3 .e- 06 4 .e- 06 5 .e- 06 6 .e- 06 7 .e- 06 8 .e- 06 9 .e- 06 1 .e- 05 time (1 s/div) output voltage (v) v dd = 5.0v g = -1 2.41 2.43 2.45 2.47 2.49 2.51 2.53 2.55 2.57 2.59 0 .e+00 1 .e- 06 2 .e- 06 3 .e- 06 4 .e- 06 5 .e- 06 6 .e- 06 7 .e- 06 8 .e- 06 9 .e- 06 1 .e- 05 time (1 s/div) output voltage (20 mv/div) v dd = 5.0v g = -1 -800 -700 -600 -500 -400 -300 -200 -100 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 chip select voltage (v) quiescent current through v ss (a) v dd = 5.5v
mcp601/2/3/4 ds21314f-page 10 2004 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +2.7v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2, v out v dd /2 and c l = 50 pf. figure 2-31: chip select pin input current vs. chip select voltage. figure 2-32: hysteresis of chip select?s internal switch. figure 2-33: the mcp601/2/3/4 family of op amps shows no phase reversal under input overdrive. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 chip select voltage (v) chip select pin current (a) v dd = 5.5v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 chip select voltage (v) internal chip select switch output voltage (v) v dd = 5.0v amplifier hi-z amplifier on cs hi to low cs low to hi -1 0 1 2 3 4 5 6 0.0e+00 5.0e-06 1.0e-05 1.5e-05 2.0e-05 2.5e-05 time (5 s/div) (input and output voltages (v) v dd = +5.0v g = +2 v in v out
2004 microchip technology inc. ds21314f-page 11 mcp601/2/3/4 3.0 applications information the mcp601/2/3/4 family of op amps are fabricated on microchip?s state-of-the-art cmos process. they are unity-gain stable and suitable for a wide range of general purpose applications. 3.1 input the mcp601/2/3/4 amplifier family is designed to not exhibit phase reversal when the input pins exceed the supply rails. figure 2-33 shows an input voltage that exceeds both supplies with no resulting phase inversion. the common mode input voltage range (v cmr ) includes ground in single-supply systems (v ss ), but does not include v dd . this means that the amplifier input behaves linearly as long as the common mode input voltage (v cm ) is kept within the specified v cmr limits (v ss ? 0.3v to v dd ? 1.2v at +25c). input voltages that exceed the input voltage range (v ss ? 0.3v to v dd ? 1.2v at +25c) can cause exces- sive current to flow into or out of the input pins. current beyond 2 ma may cause reliability problems. applications that exceed this rating must externally limit the input current with a resistor (r in ), as shown in figure 3-1. figure 3-1: r in limits the current flow into an input pin. 3.2 rail-to-rail output there are two specifications that describe the output swing capability of the mcp601/2/3/4 family of op amps. the first specification (maximum output voltage swing) defines the absolute maximum swing that can be achieved under the specified load conditions. for instance, the output voltage swings to within 15 mv of the negative rail with a 25 k load to v dd /2. figure 2-33 shows how the output voltage is limited when the input goes beyond the linear region of operation. the second specification that describes the output swing capability of these amplifiers is the linear output voltage swing. this specification defines the maximum output swing that can be achieved while the amplifier is still operating in its linear region. to verify linear operation in this range, the large signal (dc open-loop gain (a ol )) is measured at points 100 mv inside the supply rails. the measurement must exceed the specified gains in the specification table. 3.3 mcp603 chip select (cs ) the mcp603 is a single amplifier with chip select (cs ). when cs is pulled high, the supply current drops to -0.7 a (typ.), which is pulled through the cs pin to v ss . when this happens, the amplifier output is put into a high-impedance state. pulling cs low enables the amplifier and, if the cs pin is left floating, the amplifier may not operate properly. figure 1-1 is the chip select timing diagram and shows the output voltage, supply currents and cs current in response to a cs pulse. figure 2-27 shows the measured output voltage response to a cs pulse. 3.4 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces gain peaking in the frequency response with overshoot and ringing in the step response. when driving large capacitive loads with these op amps (e.g., > 40 pf when g = +1), a small series resistor at the output (r iso in figure 3-2) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitive load. figure 3-2: output resistor r iso stabilizes large capacitive loads. figure 3-3 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ) in order to make it easier to interpret the plot for arbitrary gains. g n is the circuit?s noise gain. for non-inverting gains, g n and the gain are equal. for inverting gains, g n = 1 + |gain| (e.g., -1 v/v gives g n = +2 v/v). mcp60x r in v in + ? r in maximum expected v in () v dd ? 2 ma ----------------------------------------------------------------------------- - r in v ss minimum expected v in () ? 2 ma -------------------------------------------------------------------------- - mcp60x r iso v out c l r f r g + ?
mcp601/2/3/4 ds21314f-page 12 2004 microchip technology inc. figure 3-3: recommended r iso values for capacitive loads. once you?ve selected r iso for your circuit, double- check the resulting frequency response peaking and step response overshoot in your circuit. evaluation on the bench and simulations with the mcp601/2/3/4 spice macro model are very helpful. modify r iso ?s value until the response is reasonable. 3.5 supply bypass with this family of op amps, the power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high-fre- quency performance. it also needs a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other parts. 3.6 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow. this is greater than the mcp601/2/3/4 family?s bias current at +25c (1 pa, typ.). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 3-4. figure 3-4: example guard ring layout. 1. connect the guard ring to the inverting input pin (v in ?) for non-inverting gain amplifiers, includ- ing unity-gain buffers. this biases the guard ring to the common mode input voltage. 2. connect the guard ring to the non-inverting input pin (v in +) for inverting gain amplifiers and transimpedance amplifiers (converts current to voltage, such as photo detectors). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). 3.7 typical applications 3.7.1 analog filters figure 3-5 and figure 3-6 show low-pass, second- order, butterworth filters with a cutoff frequency of 10 hz. the filter in figure 3-5 has a non-inverting gain of +1 v/v, and the filter in figure 3-6 has an inverting gain of -1 v/v. figure 3-5: second-order, low-pass sallen-key filter. figure 3-6: second-order, low-pass multiple-feedback filter. the mcp601/2/3/4 family of op amps have low input bias current, which allows the designer to select larger resistor values and smaller capacitor values for these filters. this helps produce a compact pcb layout. these filters, and others, can be designed using microchip?s filterlab ? software. 10 100 1,000 10 100 1,000 10,000 normalized load capacitance; c l / g n (f) recommended r iso ( : ) 10p 100p 1n 10n 10 100 1k g n = +1 g n t +2 guard ring v in? v in+ c 2 v out r 1 r 2 c 1 v in 47 nf 382 k 641 k 22 nf g = +1 v/v f p = 10 hz mcp60x + ? c 2 v out r 1 r 3 c 1 v in r 2 v dd /2 g = -1 v/v f p = 10 hz 618 k 618 k 1.00 m 8.2 nf 47 nf mcp60x + ?
2004 microchip technology inc. ds21314f-page 13 mcp601/2/3/4 3.7.2 instrumentation amplifier circuits instrumentation amplifiers have a differential input that subtracts one input voltage from another and rejects common mode signals. these amplifiers also provide a single-ended output voltage. the three-op amp instrumentation amplifier is illustrated in figure 3-7. one advantage of this approach is unity- gain operation, while one disadvantage is that the common mode input range is reduced as r 2 /r g gets larger. figure 3-7: three-op amp instrumentation amplifier. the two-op amp instrumentation amplifier is shown in figure 3-8. while its power consumption is lower than the three-op amp version, its main drawbacks are that the common mode range is reduced with higher gains and it must be configured in gains of two or higher. figure 3-8: two-op amp instrumentation amplifier. both instrumentation amplifiers should use a bulk bypass capacitor of at least 1 f. the cmrr of these amplifiers will be set by both the op amp cmrr and resistor matching. 3.7.3 photo detection the mcp601/2/3/4 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). this is implemented with a single resistor (r 2 ) in the feedback loop of the amplifiers shown in figure 3-9 and figure 3-10. the optional capacitor (c 2 ) sometimes provides stability for these circuits. a photodiode configured in the photovoltaic mode has zero voltage potential placed across it (figure 3-9). in this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. the key amplifier specifications for this application are: low input bias current, low noise, common mode input voltage range (including ground) and rail-to-rail output. figure 3-9: photovoltaic mode detector. in contrast, a photodiode that is configured in the photoconductive mode has a reverse bias voltage across the photo-sensing element (figure 3-10). this decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). the design trade-off is increased diode leakage current and linearity errors. the op amp needs to have a wide gain bandwidth product (gbwp). figure 3-10: photoconductive mode detector. mcp60x v 1 mcp60x v 2 r 2 r 2 r 3 mcp60x r 4 r 3 r 4 v out v ref r g + ? ? + ? + v out v 1 v 2 ? () 1 2r 2 r g --------- +
r 4 r 3 ----- -
v ref + = mcp60x v 2 r g r 2 r 2 mcp60x r 1 v out v ref v 1 r 1 - + - + v out v 1 v 2 ? () 1 r 1 r 2 ----- - 2r 1 r g --------- ++
v ref + = d 1 light v out v dd mcp60x r 2 c 2 i d1 v out = i d1 r 2 ? + d 1 light v out v dd mcp60x r 2 c 2 i d1 v out = i d1 r 2 v bias v bias < 0v ? +
mcp601/2/3/4 ds21314f-page 14 2004 microchip technology inc. 4.0 design tools microchip provides the basic design tools needed for the mcp601/2/3/4 family of op amps. 4.1 spice macro model the latest spice macro model of the mcp601/2/3/4 op amps is available on microchip?s web site at www.microchip.com. this model is intended as an initial design tool that works well in the op amp?s linear region of operation at room temperature. see the spice model firmware for information on its capabilities. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specs and plots. 4.2 filterlab ? 2.0 filterlab ? 2.0 is an innovative software tool that simplifies analog active-filter (using op amps) design. available at no cost from microchip?s web site at www.microchip.com, the filterlab active-filter software design tool provides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance.
2004 microchip technology inc. ds21314f-page 15 mcp601/2/3/4 5.0 packaging information 5.1 package marking information legend: xx...x customer specific information * yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard otp marking consists of microchip part number, year code, week code, and traceability code. 5-lead sot-23 (mcp601 and mcp601r only) example: xxnn 04nn 6-lead sot-23a (mcp603 only) xxnn example: 04nn
mcp601/2/3/4 ds21314f-page 16 2004 microchip technology inc. package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn mcp601 i/p256 0424 mcp601 i/sn0324 256 8-lead tssop example: xxxx xyww nnn 601 i324 256 14-lead pdip (300 mil) ( mcp604 only) example: 14-lead soic (150 mil) ( mcp604 only) example: xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxxxxx yywwnnn mcp604 -i/p xxxxxxxxxxxxxx 0424256 xxxxxxxxxxx mcp604 isl 0424256 xxxxxxxxxxx xxxxxxxx nnn yyww 14-lead tssop (4.4mm) ( mcp604 only) example: 604 i 256 0324
2004 microchip technology inc. ds21314f-page 17 mcp601/2/3/4 5-lead plastic small outline transistor (ot) (sot-23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.43 0.35 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0.35 .022 .018 .014 l foot length 3.10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.63 1.50 .069 .064 .059 e1 molded package width 3.00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .003 .000 a1 standoff 1.30 1.10 0.90 .051 .043 .035 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .035 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .038 p pitch 5 5 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 p d b n e e1 l c a2 a a1 p1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: mo-178 drawing no. c04-091 significant characteristic
mcp601/2/3/4 ds21314f-page 18 2004 microchip technology inc. 6-lead plastic small outline transistor (ch) (sot-23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.43 0.35 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0.35 .022 .018 .014 l foot length 3.10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.63 1.50 .069 .064 .059 e1 molded package width 3.00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .003 .000 a1 standoff 1.30 1.10 0.90 .051 .043 .035 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .035 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .038 p pitch 6 6 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 d b n e e1 l c a2 a a1 p1 exceed .005" (0.127mm) per side. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not notes: jeita (formerly eiaj) equivalent: sc-74a drawing no. c04-120 *controlling parameter
2004 microchip technology inc. ds21314f-page 19 mcp601/2/3/4 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
mcp601/2/3/4 ds21314f-page 20 2004 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
2004 microchip technology inc. ds21314f-page 21 mcp601/2/3/4 8-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a2 a a1 l c 1 2 d n p b e e1 foot angle 048048 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic
mcp601/2/3/4 ds21314f-page 22 2004 microchip technology inc. 14-lead plastic dual in-line (p) ? 300 mil (pdip) e1 n d 1 2 eb e c a a1 b b1 l a2 p units inches* millimeters dimension limits min nom max min nom max number of pins n 14 14 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .740 .750 .760 18.80 19.05 19.30 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 5 10 15 5 10 15 5 10 15 5 10 15 mold draft angle bottom * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-001 drawing no. c04-005 significant characteristic
2004 microchip technology inc. ds21314f-page 23 mcp601/2/3/4 14-lead plastic small outline (sl) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 1.27 0.84 0.41 .050 .033 .016 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 8.81 8.69 8.56 .347 .342 .337 d overall length 3.99 3.90 3.81 .157 .154 .150 e1 molded package width 6.20 5.99 5.79 .244 .236 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d p n b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-065 significant characteristic
mcp601/2/3/4 ds21314f-page 24 2004 microchip technology inc. 14-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 8 4 0 8 4 0 foot angle 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 5.10 5.00 4.90 .201 .197 .193 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 14 14 n number of pins max nom min max nom min dimension limits millimeters* inches units l c 2 1 d n b p e1 e a2 a1 a * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-087 significant characteristic
2004 microchip technology inc. ds21314f-page 25 mcp601/2/3/4 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. device mcp601 single op amp mcp601t single op amp (tape and reel for sot23, soic and tssop) mcp601rt single op amp (tape and reel for sot23-5) mcp602 dual op amp mcp602t dual op amp (tape and reel for soic and tssop) mcp603 single op amp with chip select mcp603t single op amp with chip select (tape and reel for sot23, soic and tssop) mcp604 quad op amp mcp604t quad op amp (tape and reel for soic and tssop) temperature range i = -40 c to +85 c e= -40 c to +125 c package ot = plastic sot23, 5-lead (mcp601 only) ch = plastic sot23, 6-lead (mcp603 only) p = plastic dip (300 mil body), 8, 14-lead sn = plastic soic (150 mil body), 8-lead sl = plastic soic (150 mil body), 14-lead st = plastic tssop (4.4mm body), 8, 14-lead part no. x /xx package temperature range device examples: a) mcp601-i/p: single op amp, industrial temperature, 8ld pdip package. b) mcp601-e/sn: single op amp, extended temperature, 8ld soic package. c) mcp601t-i/ot: tape and reel, industrial temperature, single op amp, 5-ld sot23 package. d) mcp601t-e/st: tape and reel, extended temperature, single op amp, 8ld tssop package e) mcp601rt-e/ot: tape and reel, extended temperature, single op amp, rotated, 5-ld sot23 package. a) mcp602-i/sn: dual op amp, industrial temperature, 8ld soic package. b) mcp602-e/p: dual op amp, extended temperature, 8ld pdip package. c) mcp602t-e/st: tape and reel, extended temperature, dual op amp, 8ld tssop package. a) mcp603-i/sn: industrial temperature, single op amp with chip select,8ld soic package. b) mcp603-e/p: extended temperature, single op amp with chip select, 8ld pdip package. c) mcp603t-e/st: tape and reel, extended temperature, single op amp with chip select, 8ld tssop package. d) mcp603t-i/sn: tape and reel, industrial temperature, single op amp with chip select, 8ld soic package. a) mcp604-i/p: industrial temperature, quad op amp, 14ld pdip package. b) mcp604-e/sl: extended temperature, quad op amp, 14ld soic package. c) mcp604t-i/st: tape and reel, industrial temperature, quad op amp, 14ld tssop package.
mcp601/2/3/4 ds21314f-page 26 2004 microchip technology inc. notes:
ds21314f-page 27 2004 microchip technology inc. information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate, powersmart and rfpic are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval, smartshunt and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, pictail, powercal, powerinfo, powermate, powertool, rflab, select mode, smartsensor, smarttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2004, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification contained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona and mountain view, california in october 2003. the company?s quality system processes and procedures are for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
ds21314f-page 28 2004 microchip technology inc. m americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com atlanta 3780 mansell road, suite 130 alpharetta, ga 30022 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, in 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 san jose 1300 terra bella avenue mountain view, ca 94043 tel: 650-215-1444 fax: 650-961-0286 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing unit 706b wan tai bei hai bldg. no. 6 chaoyangmen bei str. beijing, 100027, china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu rm. 2401-2402, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - hong kong sar unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen rm. 1812, 18/f, building a, united plaza no. 5022 binhe road, futian district shenzhen 518033, china tel: 86-755-82901380 fax: 86-755-8295-1393 china - shunde room 401, hongjian building, no. 2 fengxiangnan road, ronggui town, shunde district, foshan city, guangdong 528303, china tel: 86-757-28395507 fax: 86-757-28395571 china - qingdao rm. b505a, fullhope plaza, no. 12 hong kong central rd. qingdao 266071, china tel: 86-532-5027355 fax: 86-532-5027205 india divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-22290061 fax: 91-80-22290062 japan benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 singapore 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 taiwan kaohsiung branch 30f - 1 no. 8 min chuan 2nd road kaohsiung 806, taiwan tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe austria durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45-4420-9895 fax: 45-4420-9910 france parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany steinheilstrasse 10 d-85737 ismaning, germany tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy via quasimodo, 12 20025 legnano (mi) milan, italy tel: 39-0331-742611 fax: 39-0331-466781 netherlands p. a. de biesbosch 14 nl-5152 sc drunen, netherlands tel: 31-416-690399 fax: 31-416-690340 united kingdom 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44-118-921-5869 fax: 44-118-921-5820 02/17/04 w orldwide s ales and s ervice

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